1. Field of the Invention
The present invention relates to memory architectures for usage in circuits including microprocessors. More specifically, the invention relates to memory addressing circuit and memory addressing technique for accessing memory cells.
2. Description of the Related Art
Microprocessor architectures are continually evolving to improve and extend the capabilities of personal computers. Execution speed, power consumption, and circuit size are aspects of microprocessors and microprocessor performance that are constantly addressed by processor architects and designers in the ongoing quest for an improved product. Execution speed not only depends on the clock rate of a processor, but also upon the speed of interfaces such as cache memories and buses that supply instructions and data for execution by a processor core.
The reduction or minimization of power consumption is a highly desirable design objective for the integrated circuits in a microprocessor. Microprocessors are typically designed for usage in portable applications in which power consumption is strictly limited to a selected power envelope. In such applications, nearly every circuit is scrutinized to achieve as low a power consumption as is possible. Even in nonportable applications, conservation of power is a paramount design consideration.
What is needed is a memory addressing circuit and technique for accessing memory that reduces power consumption, decreases the physical size of memory for a given memory capacity, and improves memory access time.